The present invention relates to heart pacemakers, and in particular to a circuit for monitoring and displaying the charge status of the pacemaker battery.
It is known in pacemaker technology to display the charge status of the battery of the pacemaker at the time of testing by emitting a plurality of test pulses having a frequency dependent upon the charge status. The frequency of the test pulses can be identified by ECG technology. Generation of such test pulses, however, requires that the therapeutically set stimulation frequency must be altered during the test mode.
It is an object of the present invention to provide a heart pacemaker with a battery status test circuit which generates a simple analog display of the charge status of the battery without altering the frequency of the stimulation pulses which are normally supplied by the pacemaker.
The above object is achieved in accordance with the principles of the present invention in a battery status test circuit which includes means for generating an electrical signal which corresponds to the charge status of the battery, the signal in turn driving a pulse generator which generates at least one display pulse at the output of the pacemaker. The circuitry also includes means for chronologically positioning the display or marking pulse relative to the stimulation pulses, depending upon the charge status of the battery at the time of testing. The charge status of the battery can thereby be read from the ECG signals without disturbing normal stimulation of the heart. Display of the charge status can be undertaken in two ways. In a first embodiment, the marking pulse is emitted in each interval between two successive stimulation pulses, as long as the pacemaker is activated for reading out the charge status of the battery, i.e., is in a test mode. The position of the marking pulse relative to the preceding or following stimulation pulse indicates the charge status. In another embodiment, a marking pulse with a position dependent upon the charge status of the battery is emitted in every n.sup.th interval, where n is a whole number and the position of the marking pulse in the interval determines the decimal point following this whole number. A high display precision is thereby achieved.